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    <title>[gcc plugin] on Iskander (Alex) Sharipov technical blog</title>
    <link>https://quasilyte.dev/blog/tags/gcc-plugin/</link>
    <description>Recent content in [gcc plugin] on Iskander (Alex) Sharipov technical blog</description>
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      <title>RISC-V: custom instruction and its simulation</title>
      <link>https://quasilyte.dev/blog/post/riscv32-custom-instruction-and-its-simulation/</link>
      <pubDate>Wed, 21 Jun 2017 00:00:00 +0000</pubDate>
      
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      <description>Agenda This article shows how to add a new instruction to RISC-V and simulate it.
These topics are covered along the way:
 Whole GNU riscv toolchain installation; Implementation of a new instruction for spike RISC-V ISA simulator; Manual instruction encoding in C/C++; Custom instruction simulation (with visible output); [riscv32-]GCC plugin development;  You may find associated repository useful.
Many things can go wrong. Be prepared to fix upcoming issues by yourself.</description>
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